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6384DS–ATARM–13-Jan-10
AT91SAM9G20 Summary
– Three external clock inputs
– Five internal clock inputs
– Two multi-purpose input/output signals
Each block contains two global registers that act on all three TC Channels
Note:
TC Block 0 (TC0, TC1, TC2) and TC Block 1 (TC3, TC4, TC5) have identical user interfaces. See
Figure 8-1, “AT91SAM9G20 Memory Mapping,” on page 19 for TC Block 0 and TC Block 1 base
addresses.
10.4.6
Multimedia Card Interface
One double-channel MultiMedia Card Interface
Compatibility with MultiMedia Card Specification Version 3.11
Compatibility with SD Memory Card Specification Version 1.1
Compatibility with SDIO Specification Version V1.0.
Card clock rate up to Master Clock divided by 2
Embedded power management to slow down clock rate when not used
MCI has two slots, each supporting
– One slot for one MultiMediaCard bus (up to 30 cards) or
– One SD Memory Card
Support for stream, block and multi-block data read and write
10.4.7
USB Host Port
Compliance with Open HCI Rev 1.0 Specification
Compliance with USB V2.0 Full-speed and Low-speed Specification
Supports both Low-Speed 1.5 Mbps and Full-speed 12 Mbps devices
Root hub integrated with two downstream USB ports in the 217-LFBGA package
Two embedded USB transceivers
Supports power management
Operates as a master on the Matrix
10.4.8
USB Device Port
USB V2.0 full-speed compliant, 12 MBits per second
Embedded USB V2.0 full-speed transceiver
Embedded 2,432-byte dual-port RAM for endpoints
Suspend/Resume logic
Ping-pong mode (two memory banks) for isochronous and bulk endpoints
Six general-purpose endpoints
– Endpoint 0 and 3: 64 bytes, no ping-pong mode
– Endpoint 1 and 2: 64 bytes, ping-pong mode
– Endpoint 4 and 5: 512 bytes, ping-pong mode
Embedded pad pull-up
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